Conventional NAND flash memory cells use a floating gate transistor that stores data in a non-volatile fashion by holding a certain amount of electric charge in the floating gate. After a memory cell is programmed, as time goes by, the floating gate gradually loses its charge due to oxide leakage and charge detrapping. Data retention changes the distribution of threshold voltages Vt of the programmed states. Severe data retention changes can lead to read errors. In a flash memory based storage system, such as a solid state drive (SSD), it is important to avoid and/or handle errors caused by retention. Retention is a function of time and temperature. The longer the data stays in the memory without being re-written, the larger the retention effect. The higher the temperature, the larger the retention effect. Retention also becomes more pronounced as flash memory wears. As flash memory technology scales further towards sub-20 nm, and provides an increasing number of bits per cell (MLC, TLC, etc.), controlling retention becomes more challenging. For some applications, such as a SSD drive, retention time on a conventional flash memory can be longer than the maximum retention time specified by memory manufacturers.